1. Technical Field
Various embodiments of the present disclosure relate generally to semiconductor technologies and, more particularly, to methods of forming fine patterns.
2. Related Art
With the rapid growth of the semiconductor industry, a lot of effort has been focused on integrating more patterns in a limited area of a semiconductor substrate. That is, attempts to increase the integration density of semiconductor devices have typically focused in forming finer patterns. Various techniques have been proposed for forming fine patterns having a nano-scale critical dimension (CD), for example, from a size of about a few nanometers to about several tens of nanometers.
In the event that the fine patterns of the semiconductor devices are formed using only a photolithography process, there may be some limitations in forming the fine patterns due to image resolution limits of photolithography apparatuses used in the photolithography process. The image resolution limits of photolithography apparatuses may be due to the wavelengths of lights generated from light sources used in the photolithography apparatuses and to the resolution limit of existing optical systems used in the photolithography apparatuses. Recently, a double patterning technology (DPT) or a spacer patterning technology (SPT) has been proposed to overcome the resolution limits of the lithography apparatuses and to realize even more fine patterns.